A microcontroller runs at 16 MHz and has an 8-bit timer with a prescaler of 64. (a) What is the timer tick period and how long until the timer overflows from 0? (b) Using compare-match (CTC) mode, what compare value gives an interrupt exactly every 1 ms?
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The timer clock is f_clk / prescaler. In CTC mode the counter counts 0 to OCR, i.e. OCR + 1 ticks.
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Worked answer.
(a) Tick period and overflow time
- Timer clock = 16 MHz / 64 = 250 kHz.
- Tick period = 1 / 250,000 = 4 µs.
- An 8-bit timer counts 0 to 255 and overflows on the next tick, so it takes 256 ticks.
- Overflow time = 256 × 4 µs = 1.024 ms.
Using the overflow interrupt directly would give a 1.024 ms tick, which drifts by 2.4% from 1 ms. After 1000 interrupts you would be 24 ms off, which is unacceptable for a system clock.
(b) CTC mode for exactly 1 ms
- Ticks needed = 1 ms / 4 µs = 250.
- In CTC mode the counter goes 0, 1, ..., OCR and then resets to 0, which is OCR + 1 ticks per cycle.
- So OCR + 1 = 250, giving OCR = 249.
Check. 250 ticks × 4 µs = 1.000 ms exactly. Also 249 fits in 8 bits (maximum 255), so the 8-bit timer can do this.
Typical AVR setup (ATmega328P, Timer0): set WGM01 for CTC mode, set the prescaler bits CS01 and CS00 for /64, write OCR0A = 249, and enable the OCIE0A interrupt. Then increment a millisecond counter inside the ISR.
Alternative approach. You could preload the counter with 256 − 250 = 6 in the overflow ISR. This works but is less precise, because the reload happens a few cycles late due to interrupt latency. CTC mode resets in hardware, so it does not accumulate that error.
Common mistake. Writing OCR = 250. That gives 251 ticks, or 1.004 ms per interrupt, which is a 0.4% error.
Likely follow-up. "How would you get a 1 s delay?" Count 1000 of these 1 ms interrupts in software, or use a 16-bit timer with a larger prescaler.
Original UniCircle question. Last reviewed 28 Oct 2026.